Micron enlists IBM to speed up memory chips
Engineers in recent years have run into a “memory wall” as the increasing efficiency of computer processors outpaces the speed that memory chips can deliver, limiting the overall performance improvemement of high-end computers.
And one key bottleneck keeping memory chips from being more efficient has been the pathway they use to move data to computers’ processors and back again.
Micron’s new Hybrid Memory Cube architecture connects controllers to stacks of up to eight memory chips, making the movement of data across that pathway more efficient and making the memory chips 15 times faster than current widely-used technology allows, according to Micron technology strategist Mike Black.
IBM, using its 32 nanometer logic technology, is making the controller chips, which are then intricately connected to a stack of Micron’s memory chips.
“What you effectively do here is add this logic chip which acts as a local integrator of all the data and collects everything and sends it as fast as it can and at the lowest power-level possible to the processor. It really is a big, big change,” IBM Fellow Subu Iyer told Reuters.
If that sounds like goobledegook to most of us, think instead of highways; older chip architectures focus on adding on lanes to improve efficiency. Micron-IBM’s solution is, simply speaking, akin to centrally controlling the highway’s traffic to make it flow more smoothly.
Micron has created a consortium of companies, including chip giant Samsung Electronics, to create and implement standard specifications for the Hybrid Memory Cube technology.
While the new technology is aimed at high-end systems, it could eventually find its way into consumer products like laptops and tablets. The chips are expected to start shipping late next year.